Textured multi-junction solar cell and fabrication method

ABSTRACT

A method for forming a multi-junction photovoltaic device includes providing a germanium layer and etching pyramidal shapes in the germanium layer such that (111) facets are exposed to form a textured surface. A first p-n junction is formed on or over the textured surface from III-V semiconductor materials. Another p-n junction is formed over the first p-n junction from III-V semiconductor materials and follows the textured surface.

RELATED APPLICATION INFORMATION

This application is a Continuation application of copending U.S. patentapplication Ser. No. 13/544,380 filed on Jul. 9, 2012, incorporatedherein by reference in its entirety.

BACKGROUND

1. Technical Field

The present invention relates to multi-junction photovoltaic devices,and more particularly to textured multi-junction photovoltaic devicesand fabrication methods that result in increased efficiency.

2. Description of the Related Art

Solar devices employ photovoltaic cells to generate current flow.Photons in sunlight hit a solar cell or panel and are absorbed bysemiconducting materials, such as silicon. Carriers gain energy allowingthem to flow through the material to produce electricity. Therefore, thesolar cell converts the solar energy into a usable amount ofelectricity.

A photon need only have greater energy than that of a band gap to excitean electron from the valence band into the conduction band. Since solarradiation is composed of photons with energies greater than the band gapof silicon, the higher energy photons will be absorbed by the solarcell, with some of the energy (above the band gap) being turned intoheat rather than into usable electrical energy.

To enhance efficiency of solar cells, multi-junction cells have beendeveloped. Multi-junction cells include two or more cells stacked on topof each other. Any radiation transmitted through a top cell has a chanceof being absorbed by a lower cell.

Multi-junction solar cells composed of a stack of semiconductormaterials with different band gaps offer higher cell efficiency, butfurther improvements in efficiency are desirable and needed.

SUMMARY

A multi-junction photovoltaic device includes a germanium layer havingpyramidal shapes with (111) facets exposed to form a textured surface. Afirst p-n junction is formed on or over the textured surface. Anotherp-n junction is formed over the first p-n junction and following thetextured surface.

Another multi-junction photovoltaic device includes a germanium layerhaving pyramidal shapes with (111) facets exposed to form a texturedsurface and a plurality of p-n junctions formed from III-V semiconductormaterials. The plurality of p-n junctions are formed to follow a shapeof the (111) facets of the textured surface to increase light trappingand to increase overall device efficiency. The semiconductor III-Vmaterials have an associated bandgap energy such that the p-n junctionsare ordered by decreasing bandgap energies.

Yet another multi-junction photovoltaic device includes a germaniumlayer having pyramidal shapes with (111) facets exposed to form atextured surface. A first p-n junction is formed on or in the germaniumlayer by doping a top portion of the germanium layer. A second p-njunction is formed on the first p-n junction by an epitaxially grownGaAs-containing layer. A third p-n junction is formed on the second p-njunction by an epitaxially grown GaP-containing layer, wherein the p-njunctions follow a shape of the (111) facets of the textured surface toincrease light trapping and to increase overall device efficiency.

A method for forming a multi-junction photovoltaic device includesproviding a germanium layer; etching pyramidal shapes in the germaniumlayer such that (111) facets are exposed to form a textured surface;forming a first p-n junction on or over the textured surface from III-Vsemiconductor materials; and forming at least one other p-n junctionover the first p-n junction from III-V semiconductor materials andfollowing the textured surface.

Another method for forming a multi-junction photovoltaic device includesproviding a germanium layer; wet etching the germanium layer using anacidic etchant including hydrogen peroxide and one of phosphoric acidand hydrofluoric acid; forming pyramidal shapes in the germanium layersuch that (111) facets are exposed to form a textured surface; doping atop surface of the germanium layer to form a first p-n junction on orover the textured surface; depositing a first semiconductor layer on thetop surface which follows a profile of the textured surface; and dopinga portion of the first semiconductor layer to form a second p-njunction.

Yet another method for forming a multi-junction photovoltaic deviceincludes providing one of bulk germanium or a germanium layer formed ona silicon substrate; wet etching the germanium layer using an acidicetchant including phosphoric acid, hydrogen peroxide and ethanol in a1:1:1 ratio; forming pyramidal shapes in the germanium layer such that(111) facets are exposed to form a textured surface; doping a topsurface of the germanium layer to form a first p-n junction on or overthe textured surface; depositing a first semiconductor layer on the topsurface which follows a profile of the textured surface, wherein thefirst semiconductor layer includes a GaAs layer or alloys thereof;doping a portion of the first semiconductor layer to form a second p-njunction; depositing a second semiconductor layer on the firstsemiconductor layer, the second semiconductor layer following theprofile of the textured surface, wherein the second semiconductor layerincludes a GaP layer or alloys thereof; and doping a portion of thesecond semiconductor layer to form a third p-n junction.

These and other features and advantages will become apparent from thefollowing detailed description of illustrative embodiments thereof,which is to be read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS

The disclosure will provide details in the following description ofpreferred embodiments with reference to the following figures wherein:

FIG. 1 is a cross-sectional view of a substrate or layer of germanium inaccordance with the present principles;

FIG. 2 is a cross-sectional view of the substrate or layer of FIG. 1after wet etching to expose (111) surfaces to form a three-dimensionaltextured surface in accordance with the present principles;

FIG. 3 is a cross-sectional view of the structure of FIG. 2 after dopinga top surface of the substrate in accordance with the presentprinciples;

FIG. 4 is a cross-sectional view of the structure of FIG. 3 afterforming a first semiconductor layer in accordance with the presentprinciples;

FIG. 5 is a cross-sectional view of the structure of FIG. 4 after dopinga portion of the first semiconductor layer in accordance with thepresent principles;

FIG. 6 is a cross-sectional view of the structure of FIG. 5 afterforming a second semiconductor layer in accordance with the presentprinciples;

FIG. 7 is a cross-sectional view of the structure of FIG. 6 after dopinga portion of the second semiconductor layer in accordance with thepresent principles;

FIG. 8 is a cross-section view showing a roughed surface in accordancewith the prior art; and

FIG. 9 is a block/flow diagram showing illustrative methods for forminga multi-junction photovoltaic cell in accordance with the presentprinciples.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

In accordance with the present principles, multi-junction photovoltaiccells are formed by wet etching a surface of monocrystalline (bulk)Germanium (Ge) to enhance etching in a particular crystallographicdirection. The wet etching provides a three-dimensional textured surfacefor forming semiconductor layers which provide junctions of the device.Ge (either as bulk or epitaxially grown on Si) is lattice matched toGaAs (Si is not lattice matched to GaAs). The use of GaAs gives rise togreater flexibility in material selection, which is useful in designingand fabricating multi-junction devices. For example, cell efficiency ofgreater than 40% has been shown for tandem cells with InGaP/InGaAs/Gematerials. Texturing of multi-junction cells using non-Si-basedmaterials has not been reported, especially for large area structuresneeded for large solar panels.

In accordance with particularly useful embodiments, anisotropic wetetching is employed to form (111) facets on a Ge substrate (bulk Ge orGe layer grown epitaxially on Si). The multi-junction cell is thenformed on the (111) facets by epitaxially growing III-V semiconductorlayers. Note that the Ge needs to be thick enough to complete the (111)facets in Ge. Note that forming (111) grooves on a Si substrate and thengrowing Ge on a (111) Si surface is extremely slow or near impossibleand not practical from a manufacturing standpoint.

It is to be understood that the present invention will be described interms of a given illustrative architecture having substrates andphotovoltaic stacks; however, other architectures, structures,substrates, materials and process features and steps may be variedwithin the scope of the present invention.

It will also be understood that when an element such as a layer, regionor substrate is referred to as being “on” or “over” another element, itcan be directly on the other element or intervening elements may also bepresent. In contrast, when an element is referred to as being “directlyon” or “directly over” another element, there are no interveningelements present. It will also be understood that when an element isreferred to as being “connected” or “coupled” to another element, it canbe directly connected or coupled to the other element or interveningelements may be present. In contrast, when an element is referred to asbeing “directly connected” or “directly coupled” to another element,there are no intervening elements present.

A design for a photovoltaic device may be created for integrated circuitintegration or may be combined with components on a printed circuitboard. The circuit/board may be embodied in a graphical computerprogramming language, and stored in a computer storage medium (such as adisk, tape, physical hard drive, or virtual hard drive such as in astorage access network). If the designer does not fabricate chips or thephotolithographic masks used to fabricate chips or photovoltaic devices,the designer may transmit the resulting design by physical means (e.g.,by providing a copy of the storage medium storing the design) orelectronically (e.g., through the Internet) to such entities, directlyor indirectly. The stored design is then converted into the appropriateformat (e.g., GDSII) for the fabrication of photolithographic masks,which typically include multiple copies of the chip design in questionthat are to be formed on a wafer or substrate. The photolithographicmasks are utilized to define areas of the wafer/substrate (and/or thelayers thereon) to be etched or otherwise processed.

Methods as described herein may be used in the fabrication ofphotovoltaic devices and/or integrated circuit chips with photovoltaicdevices. The resulting devices/chips can be distributed by thefabricator in raw wafer form (that is, as a single wafer that hasmultiple unpackaged devices/chips), as a bare die, or in a packagedform. In the latter case the device/chip is mounted in a single chippackage (such as a plastic carrier, with leads that are affixed to amotherboard or other higher level carrier) or in a multichip package(such as a ceramic carrier that has either or both surfaceinterconnections or buried interconnections). In any case, thedevices/chips are then integrated with other chips, discrete circuitelements, and/or other signal processing devices as part of either (a)an intermediate product, such as a motherboard, or (b) an end product.The end product can be any product that includes integrated circuitchips, ranging from toys, energy collectors, solar devices and otherapplications including computer products or devices having a display, akeyboard or other input device, and a central processor. Thephotovoltaic devices described herein are particularly useful for solarcells or panels employed to provide power to electronic devices, homes,buildings, vehicles, etc.

It should also be understood that material compounds will be describedin terms of listed elements, e.g., GaInP, InGaAs or SiGe. Thesecompounds include different proportions of the elements within thecompound, e.g., InGaAs includes In_(x), Ga_(y)As_(1-x-y), where x, y areless than or equal to 1, or SiGe includes Si_(x)Ge_(1-x) where x is lessthan or equal to 1, etc. In addition, other elements may be included inthe compound, such as, e.g., AlInGaAs, and still function in accordancewith the present principles. The compounds with additional elements willbe referred to herein as alloys.

The present embodiments may be part of a photovoltaic device or circuit,and the circuits as described herein may be part of a design for anintegrated circuit chip, a solar cell, a light sensitive device, etc.The photovoltaic device may be a large scale device on the order of feetor meters in length and/or width, or may be a small scale device for usein calculators, solar powered lights, etc.

It is also to be understood that the present invention will be describedin terms of a particular tandem (multi-junction) structure; however,other architectures, structures, substrate materials and processfeatures and steps may be varied within the scope of the presentinvention. The tandem structure includes cells, which will be describedin terms of a particular material. Each cell includes a p-doped layer,an n-doped layer and perhaps an undoped intrinsic layer. For the presentdescription, the n-doped layer and p-doped layers will be formed eitherfrom a same base material that is doped to provide an n-type portion anda p-type portion or from two different base materials so that a firstmaterial is doped to provide the n-type portion and the second materialis doped to provide the p-type portion. For simplicity, each cell layerwill be described in terms of the base layer material. The n-doped andp-doped regions are preferably formed by doping during epitaxial growth.Other doping methods may also be employed. While intrinsic layers may beformed between the n-type and p-type layers, e.g., very thin intrinsiclayers inserted intentionally between an emitter and a base to mitigateintermixing of the dopants at a junction, the intrinsic layers, ifneeded, are not depicted in the drawings for simplicity.

Referring now to the drawings in which like numerals represent the sameor similar elements and initially to FIG. 1, a substrate 102 is shown.The substrate 102 may include a bulk Ge wafer or a relaxed Ge layerepitaxially grown on Si (not on (111) Si surfaces), or a Ge layer bondedto a Si or silicon-on-insulator (SOI) substrate. The Ge layer of thesubstrate 102 needs to be thick enough, e.g., ranging from about 5 μm toabout 500 μm to permit the formation of textured surfaces having a depthsufficient to form two or more tandem cells or junctions.

Referring to FIG. 2, the Ge substrate 102 is then textured into pyramidstructures 106 and/or inverse pyramid structures 108. The structures106, 108 include (111) facets 104. FIG. 2 is shown in cross-section,however, the pyramidal structures 106 are three-dimensional having four(111) surfaces as facets 104 per structure that meet at edges of thestructures 106. The inverse structures 108 extend into the substrate 102also having four (111) surfaces as facets 104 per structure 108.

The texturing is preferably performed using an anisotropic wet etch thatexposes (111) surfaces to form the facets 104. In one embodiment, thewet etching includes a diluted form of one or more of phosphoric acid(H₃PO₄), hydrogen peroxide (H₂O₂) and/or ethanol (C₂H₅OH). In oneembodiment, H₃PO₄:H₂O₂:C₂H₅OH is employed in a 1:1:1 ratio for etchingthe substrate 102. In another embodiment, an acidic chemistry ofHF:H₂O₂:H₂O in a 17:17:66 ratio may be employed for wet etching.

Referring to FIG. 3, a first p-n junction 130 is formed. The p-njunction is formed on or in Ge substrate or layer 102. This may includean ion implantation process to implant dopants into the Ge substrate orlayer 102 and annealing to form layer 110. In another embodiment, a gasphase diffusion may be employed to form layer 110. In yet anotherembodiment, diffusion from a solid-source (solid phase) such asphosphorosilicoglass (PSG) or borosilicoglass (BSG) or a spin-on-oxidethat contains the desired doping material is employed. The layer 110 mayinclude an n-type layer. The ion implantation, gas phase diffusion, orsolid phase diffusion dope the Ge substrate or layer 102 with n-typedopants, the substrate 102 being the p-type layer for the junction 130.It should be noted that the conductivity types may be juxtaposed (n-p)with the correct material selection or doping processes being employed.

Referring to FIG. 4, the p-n junction 130 may alternately be formedduring the epitaxial growth of a first semiconductor layer 112. Forexample, if the first semiconductor layer 112 includes GaAs, the GaAs isgrown on Ge 102. As diffuses into substrate 102 during the epitaxialgrowth also forming layer 110 and resulting in the formation of the p-njunction 130. The first semiconductor layer 112 is then continued(epitaxially grown) on the textured Ge 102 to complete formation. Thesemiconductor layer 112 has a bandgap that is greater than that of theGe substrate 102.

In another embodiment where the layer 110 is formed before depositingthe first semiconductor layer 112, the semiconductor layer 112 mayinclude GaAs or InGaAs and can alternately be grown using a metalorganic chemical vapor deposition (MOCVD) process. To form a shallowjunction in Ge by suppressing As diffusion while growing theAs-containing buffer layer, a diffusion barrier layer 103 may be grownat the interface between layers 110 and 112. The barrier layer 103 mayinclude an InGaP layer that is also lattice-matched with Ge. The growthof III-V semiconductor layers on Ge is performed at temperatures below700° C. A tunneling junction (not shown) is a layer heavily doped withIII-V dopants, which is preferably formed between two adjacent sub-cells(e.g., between layers 110 and 112).

Referring to FIG. 5, a p-n junction 132 is then formed in the firstsemiconductor layer 112 by doping a portion of layer 112. The p-njunction 132 can be formed by in-situ doping of the semiconductor layer112 during the growth or by a later doping process as described above.The structures of FIG. 5 provide two tandem junctions having latticematching and compatible band gap energies which improve the efficiencyof the device. In addition, the multi-junction structure is formed onthe (111) facets 104 which provides a geometric pyramidal shape thatimproves light trapping and therefore device efficiency. Additionaljunctions may be added to the structure of FIG. 5 as needed.

Referring to FIG. 6, additional semiconductor layers can be grown on thestructure of FIG. 5. An additional semiconductor layer 116 may includeGaP, InGaP, InGaAlP, AlGaAs or other material lattice matched with andhaving a bandgap greater than that of material of the layer 112. Forpurposes of this disclosure, lattice matched means substantially freefrom strain due to lattice mismatch. This includes, e.g., a strain ofabout 1% or less as being a practical limit on defect-free growth. Asthe number of junctions increases, the diodes with larger bandgap tendto be thinner (e.g., on the order of a few hundreds of nm). Therefore,slight strain may not be detrimental to the solar cell performance aslong as the defect density is, e.g., less than about 10⁶ cm⁻². A p-njunction 134 is formed by doping the additional semiconductor layer 116to form layer 118 in a multi-junction device 100 as depicted in FIG. 7.A tunneling junction (not shown) is preferably formed between layers 114and 116).

A p-n junction 134 (FIG. 7) can be formed by in-situ doping of thesemiconductor layer 116 during the growth or by a later doping processas described. The structure of FIG. 7 provides three tandem junctionshaving lattice matching and compatible band gap energies which improvethe efficiency of the device 100. The multi-junction structure is formedon the (111) facets 104 which provide a geometric pyramidal shape thatimproves light trapping and therefor device efficiency. Additionaljunctions may be added to the structure of FIG. 7 as needed.

Once the multi-junction tandem cell 100 is completed, device fabricationis continued by metallization, deposition of anti-reflection coatinglayers, optional layer transfers, etc. as is known in the art.

To increase the performance of the device 100, it is desirable that anyradiation that passes through a top cell or p-n junction 134 is absorbedin lower junctions or cells (or sub-cells) 132, 130. This is achieved byproviding energy gap splitting (E_(g) splitting). For example, the topcell 134 has higher band gap materials and receives light first. Thelight spectra that are not absorbed at the top cell 134 enter the cell132. A larger band gap difference between two different junctions isbetter to prevent the light spectra from being shared between thejunctions. This is to maximize photocurrent. Energy gap splittingpermits the absorption of radiation with different energies between thecells. Since the band gap of the top cell 134 is maintained at a higherlevel, the lower level cell(s) 132, 130 is/are designed to have a lowerband gap. In this way, the lower cells have a higher probability ofabsorbing transmitted radiation, and the entire multi-junction cellbecomes more efficient since there are fewer photon energy levels sharedbetween the layered cells. This results in an increased probability ofabsorbing light passing through to the bottom cell 130 hence increasingthe current in the lower cells 132, 130 and increasing short circuitcurrent, J_(SC).

To increase efficiency, it is preferable that a greater differencebetween band gaps exists between the top cell 134 (higher band gap), andthe bottom cell 130 (lower band gap) by keeping an absolute high levelof band gap energy (E_(g)) for all cells to maintain high open circuitvoltage, Voc.

Referring to FIG. 8, a conventional textured surface device 170 shows aroughed erratic surface 172. Normally, a roughened textured surface maynot be desirable, since if the surface is rough orerratically/asymmetrically formed, the rough surface can result in lightscatter and optical loss due to light absorption at the rough surface.

Since the multi-junction device 100, in accordance with the presentprinciples, is formed on flat crystal surfaces, the light scatter isreduced. The shape of substrate 102 provides junctions 130, 132 and 134,formed flat over the (111) surfaces, which creates an overall texturedsurface configured to trap and absorb light to increase efficiency.Optical loss is not increased due to the present surfaces. Light istrapped and absorbed where it is more useful in the active layers thanat intervening erratically shaped or rough surfaces.

Referring to FIG. 9, a method for forming a multi-junction photovoltaicdevice is shown in accordance with illustrative embodiments. In block202, a germanium layer is provided. This may include providing a bulkgermanium or a germanium layer formed on a silicon substrate. In block204, pyramidal shapes are etched in the germanium layer such that (111)facets are exposed to form a textured surface. The pyramidal shapes mayalso include inverse pyramidal shapes.

In block 206, the etching preferably includes a wet anisotropic etchthat exposes (111) surfaces in the Ge by selectively etching the Gealong other surfaces more rapidly. The etching may be performed using a1:1:1 H₃PO₄:H₂O₂:C₂H₅OH solution. In another embodiment, an acidicchemistry of HF:H₂O₂:H₂O in a 17:17:66 ratio may be employed for the wetetching.

In block 208, a first p-n junction is formed on or over the texturedsurface from III-V semiconductor materials. In block 210, the first p-njunction is formed by implanting ions in the germanium layer. This maybe followed by an activating anneal process. In block 212, the first p-njunction is formed by gas phase diffusing dopants in the germaniumlayer. In block, 213, the first p-n junction is formed by doping thegermanium layer by diffusing from a solid source (solid phasediffusion). In block 214, the first p-n junction may include anepitaxially grown GaAs layer (or its alloys) on the germanium layerwhere As atoms diffuse into the germanium layer. This GaAs layer ispreferably the first semiconductor layer as will be described below. Inblock 216, a barrier layer may be deposited between layers (e.g., Ge andGaAs), which is employed to reduce diffusion of Ge into the GaAs andvice versa. Tunnel junction doping may be performed between p-njunctions.

In block 218, at least one other p-n junction is formed over the firstp-n junction from III-V semiconductor materials and follows the texturedsurface. In block 220, the other p-n junction is formed by depositing afirst semiconductor layer over the first p-n junction. In block 222, aportion of the thickness of the first semiconductor layer is doped. Thismay be performed in-situ during the formation of the first semiconductorlayer to form the second p-n junction. The in-situ doping isparticularly beneficial when the first semiconductor layer is formedusing epitaxial growth. The first semiconductor layer may be depositedusing other techniques (e.g., a MOCVD process). In one alternative, thefirst semiconductor layer may be deposited and subsequently doped. Thefirst semiconductor layer may include a GaAs layer or it is alloys(e.g., InGaAs, etc.).

In block 224, a third p-n junction is formed over the second p-njunction and follows the textured surface. In block 226, a secondsemiconductor layer is deposited over the first semiconductor layer. Inblock 228, a portion of the second semiconductor layer is doped. Thedoping may be performed in-situ, which is particularly beneficial whenthe second semiconductor layer is formed using epitaxial growth. Thesecond semiconductor layer may be deposited using other techniques(e.g., a MOCVD process). In one alternative, the second semiconductorlayer may be deposited and subsequently doped. The second semiconductorlayer may include a GaP layer or it is alloys (e.g., GaInP, etc.).

In block 230, processing may continue with the formation of additionalp-n junctions. Further processing also includes the formation ofcontacts and other structures needed for completing the device. Itshould be understood that layers such as emitter layers, tunnel junctionlayers, contact layers, buffer layers, reflective layers, etc. may beformed as is known in the art.

Having described preferred embodiments for a textured multi-junctionsolar cell and fabrication method (which are intended to be illustrativeand not limiting), it is noted that modifications and variations can bemade by persons skilled in the art in light of the above teachings. Itis therefore to be understood that changes may be made in the particularembodiments disclosed which are within the scope of the invention asoutlined by the appended claims. Having thus described aspects of theinvention, with the details and particularity required by the patentlaws, what is claimed and desired protected by Letters Patent is setforth in the appended claims.

What is claimed is:
 1. A multi-junction photovoltaic device, comprising:a germanium layer having pyramidal shapes with (111) facets exposed toform a textured surface; a first p-n junction formed on or over thetextured surface; and at least one other p-n junction formed over thefirst p-n junction and following the textured surface.
 2. The device asrecited in claim 1, wherein the germanium layer includes one of bulkgermanium or a germanium layer formed on a silicon substrate.
 3. Thedevice as recited in claim 1, wherein the pyramidal shapes includeinverse pyramidal shapes.
 4. The device as recited in claim 1, whereinthe first p-n junction includes the germanium layer and a doped portionof the germanium layer.
 5. The device as recited in claim 4, wherein theat least one other p-n junction has a layer including GaAs or an alloythereof and a doped portion of the layer.
 6. The device as recited inclaim 1, further comprising a third p-n junction formed over the atleast one other p-n junction and following the textured surface.
 7. Thedevice as recited in claim 6, wherein the third p-n junction has a layerincluding GaP or an alloy thereof and a doped portion of the layer. 8.The device as recited in claim 1, further comprising a barrier layerformed between the textured surface and a first semiconductor layer ofthe at least one other p-n junction.
 9. The device as recited in claim1, wherein the first p-n junction and the at least one other p-njunction include III-V semiconductor materials.
 10. A multi-junctionphotovoltaic device, comprising: a germanium layer having pyramidalshapes with (111) facets exposed to form a textured surface; and aplurality of p-n junctions formed from III-V semiconductor materials,the plurality of p-n junctions being formed to follow a shape of the(111) facets of the textured surface to increase light trapping and toincrease overall device efficiency, the semiconductor III-V materialshaving an associated bandgap energy such that the p-n junctions areordered by decreasing bandgap energies.
 11. The device as recited inclaim 10, wherein the germanium layer includes one of bulk germanium ora germanium layer formed on a silicon substrate.
 12. The device asrecited in claim 10, wherein the pyramidal shapes include inversepyramidal shapes.
 13. The device as recited in claim 10, wherein a firstp-n junction includes at least one doped portion of the germanium layer.14. The device as recited in claim 13, wherein a second p-n junctionincludes at least one doped portion of a layer including GaAs or analloy thereof.
 15. The device as recited in claim 10, wherein a thirdp-n junction includes at least one doped portion of a layer includingGaP or an alloy thereof.
 16. A multi-junction photovoltaic device,comprising: a germanium layer having pyramidal shapes with (111) facetsexposed to form a textured surface; a first p-n junction formed on or inthe germanium layer by doping a top portion of the germanium layer; asecond p-n junction formed on the first p-n junction by an epitaxiallygrown GaAs-containing layer; a third p-n junction formed on the secondp-n junction by an epitaxially grown GaP-containing layer; wherein thep-n junctions follow a shape of the (111) facets of the textured surfaceto increase light trapping and to increase overall device efficiency.17. The device as recited in claim 16, wherein the germanium layerincludes one of bulk germanium or a germanium layer formed on a siliconsubstrate.
 18. The device as recited in claim 16, wherein the pyramidalshapes include inverse pyramidal shapes.
 19. The device as recited inclaim 16, wherein the second p-n junction includes at least one dopedportion of the GaAs-containing layer.
 20. The device as recited in claim16, wherein the third p-n junction includes at least one doped portionof the GaP-containing layer.